الجزء التانى
Correcting the pull-up of pins SELIN and AUTO.
In the original project it was lacking the pull-up in the pins Select In and Auto. Although this mistake has already been alerted by
Gitti and also in the forum of Willem, I solved you place it here. See in the outline this correction. It is not a critical correction, but it is advisable to make.

And see the local to place the resistors in the board. They are tied up to the pin 16 of own U2 IC.

Don't look at for the wire-up confusion and IC in the song right bottom. They are part of the last modification.
Improve to work on LPT port from Notebooks.
It can seem strange, but several notebooks has differences in the parallel port, they use lower of pull-up, to provide a port with larger imunit to noises and faster.
Only that this causes problems and to badly operation.
This owes to the fact of CI's series CD40xx they support a drain of smaller current. The tip is to substitute the buffers CD4503 and 4069 for 74HC367 and 74HC14, that support a very larger drain.
My programmer didn't work correctly in my notebook, a IBM ThinkPad 600. After the change of the buffers it now work perfectly.
Conversion to PCB4.5 or when the hell breaks loose
When I intended to discover as converting the old PCB3b to work with the new software, my first providence went make a small giga, to facilitate the debug & test, this way it is much faster to verify changes of the signals in the socket ZIF.
Willeprom uses a cascade of 3 shift double registers (CD4015) and it carries the 24 bits that it composes addresses bus, just as in the illustration below.
That is places one bit per time in data pin of the first 4015 and it is going pulse clock line, it makes this operation 24 times until carrying the whole bus (obs. in the case of a smaller bus, as of a 27C512, for example he carries only the necessary bits, to know, 16 bits), but what matters it is that he carries a bit per time.
When beginning the debug, using the hardware test with my leds giga, I noted that the software carried the bits from
A0 to
A7, correctly they put above of
A7, it didn't carry anything and eventually appeared "junk" in the in the addresses above
A7.
A careful observation, allowed to note that when only carrying the bit
A0, when selecting the bit
A0 for the first time, it was carried correctly, they put when give-selecting, the bit
A0 turned off, they put the bit A8 on, and when selecting the bit
A0 again, the bit
A8 turned off and on bit
A0 and
A16...
Thinking a little, it is enough to note that 8 bits are only being carried, accompany below:

When carrying the bit A0 in 1, corresponds to send 00000001 for the shift register.

When carrying the bit A0 in 0, corresponds to send 00000000 for the shitf register.
Now remember that the data are loaded serial, soon the first 8 loaded bits, they should be moved upward, soon the stack in the shift-register is being:
0000000010000000, what corresponds exactly to light the bit
A8!
Now, carrying the bit
A0 again in
1 a new sequence
00000001 will be a correspondent, soon the 16 bits that are already in the shift-register should be moved above, soon the sequence in the shift register is being:
000000001000000000000001, what will correspond exactly to set the bits
A0 and
A16!!!
Therefore it is ended that the bus is parted in smaller blocks. Analyzing the schematic of programmer, and the sequences above, it is easy to deduce that the bus went divide in three segments of 8 bits! Just lacked to discover through where the other two groups of 8 bits should come. Researching with the scope, I found these two segments, presents in the pins
DO4 and
DO5 of the printer port.
Give it was just enough to segment the bus and to tie the pin
15 of
U5 to the pin
D04 and the pin
15 of
U6 to the pin
DO5 of the parallel port, and voilá! Therefore the outline was accordingly below:

Now to stop and analyze, will discover the because the programmer is much faster when used in the new bus format. Because now instead of carrying all the necessary bits to the bus of one by one, they are divided in three groups of 8 bits, what means that in any case will just be necessary 8 clock pulses to carry the whole bus, while in the old method it was necessary the same amount of pulses that the amount of bits of the bus of the eprom.
Simple, practical and efficient!
Note that I opted including the jumps for the selection of modes, so that the board it can work on PCB3b mode, an also PCB4.5. The jumps was installed close to the leds Vcc and Vpp, there, underneath of the board is a massive copper area linked to GND, with a small drill I made the 6 pads for installation of jumps.
Even so when doing this modification, I noted that during the reading of an eprom, the programmer didn't still work correctly, in spite of the correct address in the bus, they were not read consistent data of eprom. That is to say, still has more some thing to be altered.
We are going the research again.
The data bus is read by another shift register, now a CD4014, that reads the 8 bits in a step, and it transmits them serial for the parallel port. To send the 8 bits for the parallel port they are necessary 8 pulses of individual clock, that is to say, it pulse clock and reads bit, it pulse clock and reads the bit. Just as in the illustration below:
This way notes that the program needs to be change to have written in the pin clock and reading of the data. To thick way they are necessary at least 16 operations for the reading of a byte.
When analyzing the operation of the board under the new software, I noted that 2 bits were just read of the data bus, what indicated a new bus division, now in the data bus. When placing pull-up resistors in the lines of data, to set up the bit 0FFh, I observed that was read as being 090h.
The 4014 have exits outputs in its last 3 stages of the shift register, and observed the reads data, notes that the bits are being read of 3 by 3 by software. Note: 10010000
What does the one happen then? The software this waiting the other two bits for some way, they put as there is not connected, he reads as zero. The form as the reading and done to 3 bits and exemplified below:
This way, note that are loaded 3 bits for pulse with 3 pulses of simultaneous clock. Making one analyzes as I did previously, they would be necessary at least 12 operations for the reading of the byte (three clock pulses, a reading, three clock pulses, a reading and more three clock pulses and a reading)
Researching with a resistor connected to 5V line, discovered that the reading of the bits lost is made by the pins paper end and select of the parallel port.
Therefore it would be enough to connect the pins
Q6 and
Q7 of the
4014 to these pins of the parallel port and ready. But... there is a problem, the pin
Q8, originally it goes by a inverter gate (
NOT) and observing the photo of the board in the site of the
sivava, there is no extra ic, and all gates of
74HC14 they are used. Thinking a little, I believe that the circuit have been modify in way to liberate two of the gates of
74HC14, I believe the circuit of transistor
Q5 to have been altered, to liberate the gate
U12D and also the circuit of transistor
Q3 to liberate the gate
U12C.
This would be a problem because it would involve more modifications in the board. Then I opted for add a
74HC14 SMD in bottom of board to use the two extra inverter gates. In the portion of schematic below, see as it was this part:
And in this last image, as I installed extra CI in bottom of board. The pins 2 and 4 was directly connected to pins of DB25.
تابع معى باقى الموضوع
م/ محمد فوزى